#ifndef __MEMMAP_H__
#define __MEMMAP_H__

#define SYS_CTRL_BASE   0x7030010000
#define TOP_BASE        SYS_CTRL_BASE
#define REG_TOP_CONF_INFO	0x4
#define BOOT_SEL_ADDR	(TOP_BASE + REG_TOP_CONF_INFO)
#define REG_DDR_SIZE    0X54
#define DDR_SIZE_ADDR   (TOP_BASE + REG_DDR_SIZE)

#define BOARD_TYPE_REG	(SYS_CTRL_BASE + 0x23C)
#define BOARD_TYPE_MIN				0x2
#define BOARD_TYPE_SOPHGO_X8EVB			0x2
#define BOARD_TYPE_MILKV_PIONEER		0x3
#define BOARD_TYPE_SOPHGO_PISCES		0x4
#define BOARD_TYPE_SOPHGO_X4EVB			0x5
#define BOARD_TYPE_MAX				0x5

#define MP0_STATUS		0x380
#define MP0_STATUS_ADDR 	(TOP_BASE + MP0_STATUS)
#define MP0_CONTROL     	0x384
#define MP0_CONTROL_ADDR	(TOP_BASE + MP0_CONTROL)
#define TOP_RESET_BASE		0x7030013000

#define SD_RESET_INDEX  28

#endif
